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基于DRAM和PCM的混合主存模拟器
DRAM/PCM-Based Hybrid Memory Simulator

作  者: (张德志); (万寿红); (岳丽华);

机构地区: 中国科学技术大学计算机科学与技术学院,合肥230026

出  处: 《计算机系统应用》 2017年第9期16-23,共8页

摘  要: 相变存储器(PCM)由于其非易失性、高读取速度以及低静态功耗等优点,已成为主存研究领域的热点.然而,目前缺乏可用的PCM设备,这使得基于PCM的算法研究得不到有效验证.因此,本文提出了利用主存模拟器仿真并验证PCM算法的思路.本文首先介绍了现有主存模拟器的特点,并指出其并不能完全满足当前主存研究的实际需求,在此基础上提出并构建了一个基于DRAM和PCM的混合主存模拟器.与现有模拟器的实验比较结果表明,本文设计的混合主存模拟器能够有效地模拟DRAM和PCM混合存储架构,并能够支持不同形式的混合主存系统模拟,具有高可配置性.最后,论文通过一个使用示例说明了混合主存模拟器编程接口的易用性. Phase Change Memory(PCM) has become a candidate of future main memories due to its attractive characteristics of non-volatility, high access speed, and low power consumption. Meanwhile, how to efficiently integrate PCM into current memory systems is becoming a hot topic. Generally, there are a number of choices to use PCM as main memory, e.g., to construct PCM-only main memory systems, or to construct DRAM/PCM-based hybrid memory systems.However, the conflict between numerous PCM-related researches and lack of real devices hinders evaluations of PCMaware algorithms. Therefore, in this paper, we propose a DRAM/PCM-based hybrid memory simulator. The new features of the simulator are manifold. First, it can simulate different DRAM/PCM-based memory systems, including the hierarchical architecture(DRAM as the cache of PCM) and the hybrid architecture(both DRAM and PCM as main memory). Second, it leverages a clock-accurate timing model to emulate accesses on PCM. Third, it offers a hybrid memory allocation interface that can be easily used by programmers. After a description of the simulator framework, we present basic evaluation results and a case study of the simulator, which suggest its feasibility.

关 键 词: 相变存储器 混合主存系统 模拟器

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