导　　师： 徐江涛

学科专业： 080903

授予学位： 硕士

作　　者： ;

机构地区： 天津大学

摘　　要： 随着多媒体技术和数字图像技术的发展，标清、高清甚至超高清视频迅速得到普及。在带来更清晰的画质和视觉享受的同时，视觉信息处理中的数据量及运算复杂度也急剧上升。可重构处理器相对于传统处理器能够达到更高的计算功率效率，从而有效解决以上问题，成为视觉信息处理领域中的一个新的研究热点。 本文介绍了基于可重构处理器的视觉信息处理系统的整体架构，研究分析了预处理子系统各模块的功能以及系统的数据流。然后设计了预处理子系统的各个模块电路：通过SCCB总线对图像传感器内寄存器进行配置，使传感器输出指定大小、格式的视频数据；设计了中值滤波电路，减小数字图像在传输过程中产生的噪声，降低图像噪声对角点检测、图像拼接等高级算法的影响；设计了DDR读写控制电路，使图像数据在DDR中实现帧缓存；为实现视觉信息预处理子系统与可重构处理器之间的通信，定义了两者之间的通信协议，并设计了预处理子系统与可重构处理器的接口电路；利用Microblaze处理器核作为主控制器，通过PLB总线完成系统初始化，制式校验，功能选择，数据调度等任务。此外，本文提出了一种基于图像边缘提取的开关加权矢量滤波算法，该算法在彩色图像的降噪处理过程中，能够有效的保护图像细节。 本文设计的各模块电路在Modelsim下进行的功能仿真，并在Xilinx FPGA开发平台Virtex-5XUPV5LX110T上进行了验证。采用OmmiVision公司的图像传感器芯片OV2640作为预处理子系统的图像数据源。实验结果证明预处理子系统能够正确接收图像数据源输出的数据，预处理子系统中各模块以及整个预处理系统均能正常工作。对于改进的矢量中值滤波算法，通过Matlab仿真，计算MAE、MSE、PSNR等评价指标。对大量测试图像进行实验，统计结果显示本文提出的算法相对于标准矢量中值滤波算法， PSNR值提高了7.2/%。 With the fast development of multimedia technology and digital image technology,standard definition /(SD/), high definition /(HD/) and even ultrahigh definition videoquickly gained popularity. Bringing clearer picture quality and visual enjoyment, theamount of data and computation complexity in visual information processing has alsoincreased sharply at the same time. Compared with traditional processor,reconfigurable processor can achieve the higher calculation efficiency, so as toeffectively solve the above problem, and it has become a new research focus in thefield of visual information processing. This thesis introduces the architecture of the visual information system based onreconfigurable processor and analyses the data flow in pre-processing sub-system.Then modules of the pre-processing sub-system are designed as follows: the imagesensor was configured by SCCB to make the image sensor output specific imageformat and image size. A median filter circuit was designed to eliminate impulse noisein the image and to reduce the impact of noise on corner detection, image mosaic andother advanced image processing algorithm. A DDR controller was designed to realizeimage frame caching in the DDR memory. To realize communication betweenpreprocessing system and reconfigurable processor, this thesis defined acommunication protocol between them. The whole system was controlled byMicroblaze, a processor core supported by Xilinx to complete system initialization,function change, format verification and data flow control. This thesis also proposed aweighted vector median filter based on edge detection to protect image details whenfiltering the color image. All the circuits designed in this thesis was simulated on Modelsim and verified on theplatform of LX110T. The OV2640chip of OmniVision was used as the HD imagedata source. Experimental results show that the system can correctly receive imagedata and the whole system can work in a right way. Simulation results on Matlabshow that the proposed VMF algorithm outperforms all algorithms examined in thisthesis in terms of MAE, MSE and PSNR values. Statistical results show that thePSNR values increased by7.2/%compared with standard VMF algorithm.

关 键 词： 视觉信息处理 图像降噪 中值滤波 可重构处理器

分 类 号： [TP391.41 TP332]

领　　域： [自动化与计算机技术] [自动化与计算机技术] [自动化与计算机技术] [自动化与计算机技术]