作　　者： ; ; ; ; ;

机构地区： 清华大学信息科学技术学院集成光电子学国家重点实验室

出　　处： 《功能材料与器件学报》 2003年第4期432-436,共5页

摘　　要： 深入研究了掩膜制作工艺对电感耦合等离子体刻蚀的InP端面的影响。首先比较了光刻胶、SiO_2和Si_3N_4三种材料的掩膜特性,发现掩膜图形的致密性、侧壁粗糙度和垂直度等对刻蚀效果具有至关重要的影响。然后通过优化SF_6等离子体刻蚀Si_3N_4的条件,得到了边缘平整且侧壁垂直的掩膜图形。利用这一掩膜制作技术,获得了深度达7μm的光滑垂直的InP刻蚀端面,选择比达15:1。 Effects of mask on the quality of facets etched on InP - based materials by ICP dry etching technique were studied extensively. Photoresist, SiO2, and Si3N4 films were used as etching mask and their properties were compared. It is found that the smoothness and the verticality of the mask sidewall are of great importance to the quality of etched facets. Si3N4 mask with smooth and vertical edge is formed by dry etching method. Smooth and vertical InP etched - facets of 7μm - deep are achieved by C12/CH4/ Ar ICP dry etching with this dry - etched Si3N4 mask, and the selectivity over Si3N4 is as high as 15: 1.

关 键 词： 干法刻蚀 掩膜 刻蚀端面 等离子体

领　　域： [电子电信]