作　　者： ; ; ; ; (马芝）;

机构地区： 深圳IC基地管理中心深圳518060

出　　处： 《深圳大学学报（理工版）》 2010年第4期425-427,共3页

摘　　要： 针对数字音频领域16bit精度、20kHz带宽的设计要求,以0.18μmCMOS工艺设计二阶单环的一位sigma-delta调制器,过采样率达256,采样频率达10.24MHz.调制器采用了全差分结构,由基于开关电容的积分器、时钟产生器及比较器等组成.仿真结果显示,该调制器的信噪失真比达94dB,动态范围达99dB.在1.8V电源电压下,整个系统的功耗为7.6mW. With the design requirements of 16-bit resolution and 20 kHz bandwidth for digital audio field,a second-order single-loop 1 bit sigma-delta modulator with an oversampling rate of 256 and a sampling frequency of 10.24 MHz was implemented in a 0.18 μm CMOS process.The modulator is fully differential.It consists of a switch capacitor based integrator,a clock generator and a comparator.Simulation results show that the signal to noise distortion ratio（SNDR）and the dynamic range（DR）of the implemented modulator reach 94 dB and 99 dB,respectively.The sigma-delta modulator operates with a supply voltage of 1.8 V,and consumes 7.6 mW of power.

关 键 词： 集成电路技术 数字音频 调制器 开关电容 动态范围 信噪失真比

领　　域： [电子电信] [电子电信]